Field of the Invention
Embodiments of the invention relate to the field of microelectronic processing technology, and specifically relate to a mechanical chuck and a plasma processing apparatus.
Description of the Related Art
In the process of manufacturing an integrated circuit, physical vapor deposition (hereinafter referred to as “PVD”) technique is usually used to deposit a material layer, such as a metal layer or the like, on a wafer. As through silicon via (hereinafter referred to as “TSV”) technique has been widely used, the PVD technique is mainly applied for depositing a barrier layer and a copper seed layer inside a through silicon via.
At present, an electrostatic chuck is commonly used to fix the wafer in the PVD technique. However, in the deposition process for a through silicon via, the electrostatic chuck cannot electrostatically adsorb the wafer due to large thickness and high stress of the film deposited in the through silicon via; in addition, in a subsequent packaging process, the thickness of the wafer is reduced and a glass substrate is adhered to the bottom of the wafer, so the electrostatic chuck cannot electrostatically adsorb the wafer having the glass substrate. In this case, a mechanical chuck is required to fix the wafer instead of the electrostatic chuck.
FIG. 1 is a cross-sectional view of a conventional PVD apparatus. As illustrated in FIG. 1, the PVD apparatus includes a reaction chamber 10, and a target material 14 is provided at the top inside the reaction chamber 10 and is electrically connected to a direct current (DC) power supply (not shown in the drawings). A mechanical chuck is provided below the target material 14 inside the reaction chamber 10, and includes a base 11 and a locking ring 13, wherein the base 11 is used for carrying a wafer 12 and is electrically connected to a radio frequency (RF) power supply 15, and the locking ring 13 is used for pressing an edge region of the wafer 12 disposed on the base 11 during the process so as to fix the wafer 12 onto the base 11. During the PVD process, a negative bias voltage is applied to the target material 14 by the DC power supply to excite a process gas in the reaction chamber 10 to form plasma, and attract energetic particles in the plasma to bombard the target material 14, so as to allow metal atoms on a surface of the target material 14 to escape and be deposited on the wafer 12. At the same time, RF power is applied to the base 11 by the RF power supply 15 to form a negative bias voltage on an upper surface of the wafer 12, which can attract the sputtered metal atoms to be deposited into the through silicon via, thereby filling the through silicon via.
In practice, the degree to which the plasma is controlled by the negative bias voltage is generally measured by resputter rate, which refers to a ratio (usually larger than one) of the average thin-film resistance under RF power to the average thin-film resistance without RF power, and a larger ratio means that the plasma can bombard the surface of the wafer more vertically, thus, a through silicon having a relatively large depth-to-width ratio (larger than 6:1) can be filled.
It was found in experiments that, when a RF power of 600W is applied to a mechanical chuck and an electrostatic chuck, respectively, the resputter rate of the electrostatic chuck is 1.18 while the resputter rate of the mechanical chuck is only 0.88. This situation results from the fact that the value of the negative bias voltage depends on the size of a capacitor area under the condition of same process duration and same RF power, that is, the smaller the capacitor area, the larger the negative bias voltage, and otherwise the negative bias voltage is smaller. The capacitor is formed between one or more elements electrically connected to the RF power supply and the ground with plasma accommodated therebetween, and the term “capacitor area” refers to a total area of a surface of the one or more elements exposed in the plasma. For an electrostatic chuck, the capacitor area thereof is an area of the upper surface of the wafer. For a mechanical chuck, for the purpose of avoiding sparking at the time of applying a RF power to the base 11 by the RF power supply 15, the base 11, the wafer 12 and the locking ring 13 are required to be electrically connected with each other to allow the three to at a same voltage level, which makes that the RF voltage is applied to each of the base 11, the wafer 12 and the locking ring 13, so the capacitor area of the mechanical chuck is the sum of the areas of upper surfaces of the wafer 12 and the locking ring 13.
Since the area of the upper surface of the locking ring 13 is comparable with that of the wafer 12 (taking a 300-mm PVD apparatus for example, the area of the upper surface of the wafer 12 is 0.071 m2 and the area of the upper surface of the locking ring 13 is 0.055 m2), the negative bias voltage formed on the upper surface of the wafer 12 is reduced due to the nearly doubled capacitor area of the mechanical chuck compared to that of the electrostatic chuck, thereby reducing resputter rate. Although the negative bias voltage can be increased by increasing RF power, the increase of RF power will result in not only an increasing cost for use but also a rising temperature of the reaction chamber 10 and the wafer 12, thereby adversely affecting lifetime of the reaction chamber 10 and process quality.